Found in 3 comments on Hacker News
ChuckMcM · 2013-02-23 · Original thread
This is awesome. One of the running bets I've had is how many chapters of Hennesy [1] you can implement in an FPGA. Early on it was hard to do more than basic RISC architectures, the 6502 Etc. Then you could do the Z80 which was a good cisc variant that had some excellent code tests. The 8086 and 68000 make for good follow on targets. At some point we should be able to do a VAX, its sort of a local maximum of CISCyness.


scott_s · 2011-04-10 · Original thread
I was a computer science student in undergrad and grad school. None of the CS undergrad curriculums I was involved with (either as a student or as a TA) had this level of architecture for undergrad CS majors.

For the record, my grad class used Hennessy and Patterson ( Also, I think that "summary" should indicate that the real thing will have "much more grueling detail."

sb · 2011-02-24 · Original thread
Regarding point 2: Last time I checked (IIRC 2006-ish), there seemed to be common resentiment among scientists working in the area of programming language implementation that there is just too little ILP for successful wide-spread VLIW adoption (modulo some special use cases.)

AFAI(K|R), Hennesy and Patterson's cannonical text (CA-AQA [1]) reflects this: going from 3rd to 4th edition, we find a new chapter "Limits on ILP", VLIW/EPIC elements have been moved from the main contents to the CD-ROM, too (which probably is not a good indicator, though: the 3rd edition was just too heavy to carry it around a lot ;)


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