Originally MIPS (or DLX) was the dominant architecture used for teaching computer architecture because the standard Computer Architecture textbook (by one of the main designers of MIPS, David Patterson [1] along with John L. Hennessy [2]) was used in most universities [3]. These two authors were basically the university-lead designers of the RISC philosophy. Patterson's team designed the RISC-I and RISC-II processors (Berkeley RISC [4]). Hennessy and his team designed the MIPS processors (Stanford MIPS [5]). This culmination eventually begot the RISC-V. So yeah, the RISC-V is now the dominant architecture used for teaching computer architecture as they now use RISC-V to teach computer architecture with their latest book edition [6]. Also for more information on that, read [7].

[1] https://en.wikipedia.org/wiki/David_Patterson_(computer_scie...

[2] https://en.wikipedia.org/wiki/John_L._Hennessy

[3] https://www.amazon.com/Computer-Architecture-Quantitative-Jo...

[4] https://en.wikipedia.org/wiki/Berkeley_RISC

[5] https://en.wikipedia.org/wiki/Stanford_MIPS

[6] https://www.amazon.com/Computer-Organization-Design-RISC-V-A...

[7] https://en.wikipedia.org/wiki/RISC-V#History

> If your point is that this second FP32 unit can't always be used at 100%

My point is that the second FP32 unit is not a core, in the sense of https://www.amazon.com/Computer-Architecture-Quantitative-Jo... which, it is my understanding, was a well-established standard; nothing more, nothing less.

This is THE textbook on the subject: https://www.amazon.com/Computer-Architecture-Quantitative-Jo...

There are older editions available free online that cover the same concepts, they just don't have the very latest info.

I'd suggest reading the wiki articles about it for an introduction, and Ch 5 of https://www.amazon.com/Computer-Architecture-Quantitative-Jo... for a detailed understanding.

Right now you're asserting things about all this, while not being familiar with relatively basic aspects of how it works.