Found 4 comments on HN
leoc · 2019-02-22 · Original thread
In Ben Eater's breadboard-computer videos https://eater.net/8bit he recommends Digital Computer Electronics by Malvino and Brown. (I haven't read it yet myself.)

https://www.amazon.com/Digital-Computer-Electronics-Jerald-M...

Limb · 2017-03-31 · Original thread
Very nice! I had the same idea, and had started laying out the designs he was using in KiCAD as well. If you haven't already I suggest picking up a copy of Digital Computer Electronics [0] by Malvino, which he uses as a basis for his designs. It's a great reference and lets you dive a little deeper into the design as well.

[0] https://www.amazon.com/Digital-Computer-Electronics-Albert-M...

whistlerbrk · 2015-01-28 · Original thread
Never heard of this but the comments here are piquing my interest.

I'm currently reading Digital Computer Electronics (1977 edition, current here: http://www.amazon.com/Digital-Computer-Electronics-Albert-Ma...).

Would others agree this might be a nice follow up for me, especially if I'm looking for more current material now that I (am starting to) get the fundamentals?

blasdel · 2009-03-14 · Original thread
I tried to do a similar project in Spring 2007. I ended up with a mandate to teach a 10-week tutorial in Verilog to a small group of Intro-CS students. To start with I had them implement several basic projects like calculators and 7-segment scrollers.

For a finishing project I tried to have them implement the SAP-1 from Malvino & Brown's classic book, which they were already familiar with (http://www.amazon.com/dp/0028005945) -- It has a 8-bit word/bus, 3 registers, a 4-bit address space, and 4-bit single-operand instructions.

I had the idea that it should be pedagogically ideal, hopefully implemented as a single <30 line module, and couched in the motives of Alan Kay. Unfortunately I couldn't find a way to implement JMP in a single quasi-clock-cycle with a Von Neumann architecture. I had to rewrite it a dozen times, the first half getting it to synthesize, the latter getting it to place/route. Even once I got it running on a FPGA, the JMP never worked right.

I never thought to cheat by using a Harvard architecture, mostly because it would stop being anything like Malvino's SAP.

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